000			00490nam a2200181Ia 4500
999			_c109057 _d109057
005			20180403144551.0
008			180313s9999||||xx |||||||||||||| ||und||
020			_a9780080971292
040			_aUPES LIBRARY _bEnglish
082			_a621.395 _bWIL
100			_aWilson, Peter _962504
245		0	_aDesign recipes for fpgas: using verilog and VHDL
250			_a2nd ed.
260			_bElsevier, _aNew York: _c2016
300			_axix, 369p.
650			_aCircuit design _918690
942			_cREF